Openings in ST Microelectronics
Sunday, December 25, 2011
Kindly find below the list of req. of ST Microelectronics (India)PVT. LTD (www.st.com ), Greater Noida , please take a look and send me your updated CV ASAP. Also let me know out of the list which req. is close to your profile so that we can share your resume with the right hiring team.
You can also share this email along with your friends incase if they are interested.
Position: DFT Engineer
Position Description
SoC DFT team needs an experienced colleague to work on DFT tasks for). This position requires sound understanding of advance ATPG & BSD concepts to define, implement and verify innovative DFT solutions to achieve maximum test-coverage at minimum cost in terms of silicon area and test time. Interaction with Test/Product Engineering and EDA Tool-vendors teams for debug and bug-fixing is a crucial part of the job. Define and implement test mode specifications for top as well as for IPs, wherever possible. Guide DFT team members for other Non ATPG tests.
Qualifications
B.Tech in CS/EE, as Minimum qualification
Skills Required
1. Scan Insertion through DFT-MAX.
2. APTG through TetraMax tool.
3. ATPG generation with On-Chip-Clocking scheme.
4. Static Timing Analysis in ATPG modes through PrimeTime.
5. ATPG failures debug experience on ATE.
6. ATPG pattern simulation and debug.
7. Boundary Scan insertion pattern generation and simulation.
Experience
4-8years on DFT tasks experience
SW STB
Position Description
The incumbent should have 2-4 years of embedded software development experience with a sound academic background. Job requires embedded software development for multimedia applications (Set Top Box, IPTV, etc...) . Experience in C/C++ programming is a must. Experience in Multimedia driver development/porting, knowledge of Audio and Video technology is preferred. Strong embedded software design and debugging skills are required. Good level of understanding of Linux Operating system.
Skills Required
Desired Competencies
-Good C programming skills
- Linux Operating System
- Embedded software Architecture, Design and programming
- Audio/Video Codec"s standards
- STB Knowledge
Education : B.Tech (electronics)
HED:Embedded Sw(networking)
Position Description:
To develop and maintain network software stack for the DOCSIS IP used in the Set-top box SoCs developed in the CHD R&D.
Profile Required:
- Network Protocols (TCP/UDP/IPv4/IPv6/Ethernet/TFTP/DHCPv4/v6)
- Network Management (SNMP)
- Proficient in C/C++ and Data structures
- Exposure to software development for Embedded domain
- Strong concepts of Operating systems(RTOS/Linux),
- Familiarity with DOCSIS (preferred)
Education: B.Tech(Electronics),
Experience: 2 to 3 yrs
Location of Posting: Greater Noida
HED: Video Codec (Integration) ,
Position Description
As a Video codec development engineer, you will be responsible for
- Integration and delivery of the video firmware for STAPI / SHARK software releases.
- Understanding and analyzing the root cause for any regressions introduced following recommended baselines for firmware and drivers
- Maintaining the portal (SWIP) for delivery of the requested software to various internal and external customers.
- Support to other teams in case of any integration issues with video driver and firmware
Profile required
- Exposure to video/image compression standards (H264, MPEG2, MPEG4, VPx, etc)
- Operating systems - RTOS, Linux ...
- Embedded software development - Programming in C/C++ & Shell scripting in sh/tcsh
- Exposure to embedded software development using any RTOS/Linux
Education: B.Tech(Electronics)
Experience: 2 to 4 yrs
Location of Posting: Greater Noida
HED: Audio Firmware
Position Description:
To develop firmware for Audio Codecs used in the Settop box SoCs developed in HED.
Profile Required:
- Proficient in C/C++/Assembly Language programming,
- Strong Signal Processing background with exposure to modelling tools (Matlab, Semilina), fixed point porting, DSP programming
- knowledge of Multimedia API (DirectX, OpenMax, Gstreamer..) preferred
Education: B.Tech(Electronics),
Experience: 3 to 5yrs
Location of Posting: Greater Noida
Audio Device Driver Development
No of Job Positions: 7
Position Description:
To develop software (drivers) for IPs used in the Settop box SoCs developed in the HVD R&D.
Profile Required:
- Proficient in C/C++/Assembly Language Programming
- Exposure to firmware/software development for Embedded domain
- Experience in RTOS/Linux device driver development for Microcontrollers for STB
- Exposure to STB s/w stack and Digital Communication
Education: B.Tech(Electronics),
Experience: 2 to 5yrs
Location of Posting: Greater Noida
HED: BackEnd Design ,
Position Description
To run the full BE run from netlist to gds based on ST internal flow
Profile Required: Experience in
- Digital Electronics OPAMPS , Flip Flop"s , Counters .
- Digital CMOS logic circuits and design .
- Basic Analog Circuits.
- VLSI fundamentals.
- Semiconductor behavior and applications.
- Memories , DRAM ,SRAM , DDR ,ROM .
- Microprocessor Architecture.
Education: B.Tech(Electronics),
Experience: 1 to 4yrs
Location of Posting: Greater Noida
Back End Design Engineer ( PnR)
Position Description
The incubent will be responsible for Physical Implementation of Imaging SoC"s. Primarily - BE (Floor Plan, PNR, Clock-tree, TA, IRdrop, Sign-ff, Mask finishing) and participate in FE (synthèses, TA, Formal Verification, Sign-off, Hand-off) if needed.
Skills Required
Desired Competencies are -
1. Expertise in place and route (PNR) , Signoff, Experience in Floorplan, , DRC-LVS (Calibre ), IR-Drop , TA including Signal integrity
2. Exposure to tools...Cadence , Magma , Synopsys PNR tools , Mentor for DRC LVS , Primetime for TA , Apache etc ,
Good to have
1. Knlowledge of Verilog, Synthesis (DC/RC) Scan insertion, TA, Formal Verification ,Signoff , Handoff is preferred
Experience : 2 to 4 years
Education : B.Tech/M.Tech (electronics)
Location of Posting: Greater Noida
SoC Functional Verification
Position Description
To execute and implement Functional Verification of various blocks in a STB SoC using latest simulation tools and methodologies.
Strong Digital Electronics fundamentals, Good overview of working of a SoC and familiarity of Serial and Standard Bus protocols is an added advantage.
Profile Required
Experience of HDL simulation tools,
RTL design debugging, and knowhow/experience in C, language.
Understanding of basic hardware design principles and knowledge of HDL languages (VHDL, verilog)
Knowledge of Microcontroller and its working will be an added advantage.
Strong Debugging skills using traditional design browsing and industry standard tools.
Experience in Functional Verification of SoC"s Verification Test Environments using Testbenches(VHDL/Verilog/SysC) and
Writing and debugging of 'C' Testcases based on SoC scenarios.
Qualification : B.Tech/ M.Tech(Electronics)
Location: Greater Noida
Exp: 1-5 yrs
HED-ISG IP design and verification
No of positions 2
Position Description:
HED-ISG IP design and verification team design and Verify pure H/W based as well as firmware based complex high speed interconnect IP(s) and Subsystem. The team delivers next generation communication IPs and subsystem used in Set Top Box & TV SOCs as well as to other ST"s division. Subsystem verification position is required for high speed interconnect protocol.
Profile Required
- Proficiency in CPU architecture and micro-controller.
- Proficiency in Unix/Linux Environment and development platform.
- Good knowledge of scripting language like PERL, SHELL etc.
- Knowledge of ON-CHIP BUS Architecture (AHB/AXI etc) .
- Knowledge of OFF-CHIP BUS Architecture (USB/SATA etc)
- Knowledge of digital design concepts.
- Good documentation and communication skills.
- Very Good problem solving and debugging skill.
Education: B.Tech/ M.Tech(Electronics)
Experience: 1 to 5 yrs
Location of Posting: Bangalore
Post Silicon Validation:
Qualification: B.Tech-Electronics
Location: Greater Noida
Experience: 1 - 4 yrs
- Embedded 'C'
- Good understanding on computer architecture, RTOS
- Knowledge of Test Equipment like Oscilloscope/Logic analyzer/Protocol analyzers and Analog Ckts is a plus.
- Excellent problem solving Skill.
Thanks & Regards
Abhay Kumar
9015212821/9711862286
011-26186988
EMAIL- abhay@connectprosearch.com/ abhay@connectpro.co.in
You can also share this email along with your friends incase if they are interested.
Position: DFT Engineer
Position Description
SoC DFT team needs an experienced colleague to work on DFT tasks for). This position requires sound understanding of advance ATPG & BSD concepts to define, implement and verify innovative DFT solutions to achieve maximum test-coverage at minimum cost in terms of silicon area and test time. Interaction with Test/Product Engineering and EDA Tool-vendors teams for debug and bug-fixing is a crucial part of the job. Define and implement test mode specifications for top as well as for IPs, wherever possible. Guide DFT team members for other Non ATPG tests.
Qualifications
B.Tech in CS/EE, as Minimum qualification
Skills Required
1. Scan Insertion through DFT-MAX.
2. APTG through TetraMax tool.
3. ATPG generation with On-Chip-Clocking scheme.
4. Static Timing Analysis in ATPG modes through PrimeTime.
5. ATPG failures debug experience on ATE.
6. ATPG pattern simulation and debug.
7. Boundary Scan insertion pattern generation and simulation.
Experience
4-8years on DFT tasks experience
SW STB
Position Description
The incumbent should have 2-4 years of embedded software development experience with a sound academic background. Job requires embedded software development for multimedia applications (Set Top Box, IPTV, etc...) . Experience in C/C++ programming is a must. Experience in Multimedia driver development/porting, knowledge of Audio and Video technology is preferred. Strong embedded software design and debugging skills are required. Good level of understanding of Linux Operating system.
Skills Required
Desired Competencies
-Good C programming skills
- Linux Operating System
- Embedded software Architecture, Design and programming
- Audio/Video Codec"s standards
- STB Knowledge
Education : B.Tech (electronics)
HED:Embedded Sw(networking)
Position Description:
To develop and maintain network software stack for the DOCSIS IP used in the Set-top box SoCs developed in the CHD R&D.
Profile Required:
- Network Protocols (TCP/UDP/IPv4/IPv6/Ethernet/TFTP/DHCPv4/v6)
- Network Management (SNMP)
- Proficient in C/C++ and Data structures
- Exposure to software development for Embedded domain
- Strong concepts of Operating systems(RTOS/Linux),
- Familiarity with DOCSIS (preferred)
Education: B.Tech(Electronics),
Experience: 2 to 3 yrs
Location of Posting: Greater Noida
HED: Video Codec (Integration) ,
Position Description
As a Video codec development engineer, you will be responsible for
- Integration and delivery of the video firmware for STAPI / SHARK software releases.
- Understanding and analyzing the root cause for any regressions introduced following recommended baselines for firmware and drivers
- Maintaining the portal (SWIP) for delivery of the requested software to various internal and external customers.
- Support to other teams in case of any integration issues with video driver and firmware
Profile required
- Exposure to video/image compression standards (H264, MPEG2, MPEG4, VPx, etc)
- Operating systems - RTOS, Linux ...
- Embedded software development - Programming in C/C++ & Shell scripting in sh/tcsh
- Exposure to embedded software development using any RTOS/Linux
Education: B.Tech(Electronics)
Experience: 2 to 4 yrs
Location of Posting: Greater Noida
HED: Audio Firmware
Position Description:
To develop firmware for Audio Codecs used in the Settop box SoCs developed in HED.
Profile Required:
- Proficient in C/C++/Assembly Language programming,
- Strong Signal Processing background with exposure to modelling tools (Matlab, Semilina), fixed point porting, DSP programming
- knowledge of Multimedia API (DirectX, OpenMax, Gstreamer..) preferred
Education: B.Tech(Electronics),
Experience: 3 to 5yrs
Location of Posting: Greater Noida
Audio Device Driver Development
No of Job Positions: 7
Position Description:
To develop software (drivers) for IPs used in the Settop box SoCs developed in the HVD R&D.
Profile Required:
- Proficient in C/C++/Assembly Language Programming
- Exposure to firmware/software development for Embedded domain
- Experience in RTOS/Linux device driver development for Microcontrollers for STB
- Exposure to STB s/w stack and Digital Communication
Education: B.Tech(Electronics),
Experience: 2 to 5yrs
Location of Posting: Greater Noida
HED: BackEnd Design ,
Position Description
To run the full BE run from netlist to gds based on ST internal flow
Profile Required: Experience in
- Digital Electronics OPAMPS , Flip Flop"s , Counters .
- Digital CMOS logic circuits and design .
- Basic Analog Circuits.
- VLSI fundamentals.
- Semiconductor behavior and applications.
- Memories , DRAM ,SRAM , DDR ,ROM .
- Microprocessor Architecture.
Education: B.Tech(Electronics),
Experience: 1 to 4yrs
Location of Posting: Greater Noida
Back End Design Engineer ( PnR)
Position Description
The incubent will be responsible for Physical Implementation of Imaging SoC"s. Primarily - BE (Floor Plan, PNR, Clock-tree, TA, IRdrop, Sign-ff, Mask finishing) and participate in FE (synthèses, TA, Formal Verification, Sign-off, Hand-off) if needed.
Skills Required
Desired Competencies are -
1. Expertise in place and route (PNR) , Signoff, Experience in Floorplan, , DRC-LVS (Calibre ), IR-Drop , TA including Signal integrity
2. Exposure to tools...Cadence , Magma , Synopsys PNR tools , Mentor for DRC LVS , Primetime for TA , Apache etc ,
Good to have
1. Knlowledge of Verilog, Synthesis (DC/RC) Scan insertion, TA, Formal Verification ,Signoff , Handoff is preferred
Experience : 2 to 4 years
Education : B.Tech/M.Tech (electronics)
Location of Posting: Greater Noida
SoC Functional Verification
Position Description
To execute and implement Functional Verification of various blocks in a STB SoC using latest simulation tools and methodologies.
Strong Digital Electronics fundamentals, Good overview of working of a SoC and familiarity of Serial and Standard Bus protocols is an added advantage.
Profile Required
Experience of HDL simulation tools,
RTL design debugging, and knowhow/experience in C, language.
Understanding of basic hardware design principles and knowledge of HDL languages (VHDL, verilog)
Knowledge of Microcontroller and its working will be an added advantage.
Strong Debugging skills using traditional design browsing and industry standard tools.
Experience in Functional Verification of SoC"s Verification Test Environments using Testbenches(VHDL/Verilog/SysC) and
Writing and debugging of 'C' Testcases based on SoC scenarios.
Qualification : B.Tech/ M.Tech(Electronics)
Location: Greater Noida
Exp: 1-5 yrs
HED-ISG IP design and verification
No of positions 2
Position Description:
HED-ISG IP design and verification team design and Verify pure H/W based as well as firmware based complex high speed interconnect IP(s) and Subsystem. The team delivers next generation communication IPs and subsystem used in Set Top Box & TV SOCs as well as to other ST"s division. Subsystem verification position is required for high speed interconnect protocol.
Profile Required
- Proficiency in CPU architecture and micro-controller.
- Proficiency in Unix/Linux Environment and development platform.
- Good knowledge of scripting language like PERL, SHELL etc.
- Knowledge of ON-CHIP BUS Architecture (AHB/AXI etc) .
- Knowledge of OFF-CHIP BUS Architecture (USB/SATA etc)
- Knowledge of digital design concepts.
- Good documentation and communication skills.
- Very Good problem solving and debugging skill.
Education: B.Tech/ M.Tech(Electronics)
Experience: 1 to 5 yrs
Location of Posting: Bangalore
Post Silicon Validation:
Qualification: B.Tech-Electronics
Location: Greater Noida
Experience: 1 - 4 yrs
- Embedded 'C'
- Good understanding on computer architecture, RTOS
- Knowledge of Test Equipment like Oscilloscope/Logic analyzer/Protocol analyzers and Analog Ckts is a plus.
- Excellent problem solving Skill.
Thanks & Regards
Abhay Kumar
9015212821/9711862286
011-26186988
EMAIL- abhay@connectprosearch.com/ abhay@connectpro.co.in
0 comments:
Post a Comment